Validation on Embedded System related Questions and Answers - Page 3

Question 21 : Which gate is used in the geometrical representation, if a single event causes hazards?
1. AND
2. NOT
3. NAND
4. OR
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Question 22 : Which of the following have flip-flops which are connected to form shift registers?
1. scan design
2. test pattern
3. bit pattern
4. CRC
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Question 23 : Which of the following is also known as boundary scan?
1. test pattern
2. JTAG
3. FSM
4. CRC
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Question 25 : Which of the following is based on fault models?
1. alpha-numeric pattern
2. test pattern
3. bit pattern
4. parity pattern
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Question 26 : Which of the following is also known as equivalence checker?
1. BDD
2. FOL
3. Tautology checker
4. HOL
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Question 27 : Which is a top-down method of analyzing risks?
1. FTA
2. FMEA
3. Hazards
4. Damages
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View 21 - 27 of 27 Questions

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